Manufacturing process for vdW coat from BP. a, b, Schematic (a) and optical image (b) of a multilayer BP flake exfoliated on a silicon substrate. c, d, schematic (c) and optical image (d) of a Pt strip physically laminated onto a BP flake. e, f, By physically peeling off the Pt strip (e), the topmost BP layer is removed dry and the intrinsic properties of the remaining layers are retained (f). 1L, one layer. g, h, AFM height measurement (g) and enlarged AFM image (h) for the vdW peeled BP flake shown in f. The thinned region shows a small surface roughness (rms value, rms value) of 0.15 nm, indicating the pristine surface after the vdW peeling process. i, Optical image of the second peel of the BP burst shown in f, with 90° rotation of the Pt band. Scale bars, 10 μm in b, d, f and i, 3 μm in g and 1 μm to h. Credit: Natural electronics (2023). DOI: 10.1038/s41928-023-01087-8
Two-dimensional (2D) semiconductor materials have shown great promise for the development of various electronic devices, including wearable devices and smaller electronic devices. These materials can offer significant advantages over their bulky counterparts, for example by retaining their mobility regardless of their reduced thickness.
Despite their promise of creating thin electronic components, 2D semiconductors have until now only rarely been used to create single-layer transistors, thinner versions of the crucial electronic components used to modulate and amplify electric current at the same time. inside most existing devices. Most proposed single-layer transistors based on 2D semiconductors have been created using a few carefully selected materials known to have relatively stable lattice structures, such as graphene, tungsten diselenide, or molybdenum disulfide (MoS2).
Researchers from Hunan University, the Chinese Academy of Sciences and Wuhan University recently set out to develop new single-layer transistors using alternative 2D semiconductor materials that have so far been mainly used to create multilayer transistors, including black phosphorus (BP) and germanium arsenide (GeAs). Their work is published in the journal Natural electronics.
“For a number of promising 2D materials, such as black phosphorus and germanium arsenide, manufacturing single-layer transistors is challenging and is limited by difficulties in forming robust electrical contacts with the delicate 2D materials,” Wangying Li, Quanyang Tao and colleagues. » wrote in their diary. “We report the fabrication of single-layer black phosphorus and germanium arsenide transistors with raised three-dimensional contacts using a Van der Waals peeling technique.”
The main goal of this team of researchers’ recent work was to create new transistors based on 2D single-layer semiconductors, beyond those that have so far been primarily used in single-layer transistor designs. This presents several challenges, as some of these materials are difficult to reduce uniformly and without compromising their intrinsic properties.
To achieve this, Li, Tao and their collaborators developed a van der Waals (vdW) peeling technique that can be used to create single-layer 2D transistors with 3D raised contacts. The technique involves layering flat metals onto multilayer 2D channels, allowing researchers to remove the semiconductor layer at the top of the stack by peeling away the metal.
“Through mechanical layer-by-layer peeling, the channel region of a multilayer black phosphorus transistor can be gradually reduced to a single-layer thickness without degrading its delicate network and while retaining a multilayer contact region,” Li wrote, Tao and their colleagues.
As part of their study, the team used the proposed peeling technique to create homo-junctions and homo-superlattices based on various 2D semiconductors, including BP, GeAs, InSe (indium selenide) and GaSe (gallium selenide).
The team found that the proposed method allowed them to thin the channel portion of their transistors while maintaining the required thickness in the contact region.
“Using this technique, we measure the electrical properties of the same 2D transistor with different channel thicknesses,” Li, Tao and colleagues wrote. “We find that black phosphorus carrier mobility decreases sharply upon reducing body thickness, behaving more like a conventional bulk semiconductor rather than a pure Van der Waals semiconductor.”
In their recent study, the researchers demonstrated the potential of their technique to develop promising single-layer transistors with 3D raised contacts based on BP and GeAs. In the future, their layer-by-layer peeling method could open new horizons for creating thinner, scalable transistors using rare 2D semiconductors, generally considered low-performance for these applications.
“The work has potential implications for other unstable single-layer materials beyond 2D semiconductors, such as organic monolayers and perovskite monolayers, which were previously thought to be non-conductive or have poor intrinsic properties, but which are actually limited by the poor contact between metal and monolayers,” added Li, Tao and their colleagues.
More information:
Wanying Li et al, Black phosphorus and germanium arsenide monolayer transistors via van der Waals channel thinning, Natural electronics (2023). DOI: 10.1038/s41928-023-01087-8
© 2024 Science X Network
Quote: New transistors based on single-layer black phosphorus and germanium arsenide (January 6, 2024) retrieved on January 8, 2024 from
This document is subject to copyright. Apart from fair use for private study or research purposes, no part may be reproduced without written permission. The content is provided for information only.
